Electronic storage systems may be implemented in electronic systems, such as computers, cell phones, hand-held electronic devices, etc. Some storage systems, such as solid state drives (SSDs), may include non-volatile memory devices. Non-volatile memory devices provide persistent data by retaining stored data when not powered and may include NAND flash memory, among other types of non-volatile memory.
In some examples, a NAND flash memory may include groups (e.g., strings) of series-coupled (e.g., one-transistor) non-volatile memory cells. The series-coupled memory cells in a string, for example, may be between a data line (e.g., a bit line) and a source. For example, the memory cells in a string may be coupled in series source to drain. Memory cells at respective locations in the strings, for example, may be commonly coupled to respective access lines, such as word lines.
A number of strings may be grouped together to form a block of memory cells. A block may include physical pages. For example, a physical page may include a number of memory cells whose control gates are commonly coupled to an access line. A read or write operation in NAND memory may be performed at the page level, but erase operations are performed at the block level. Non-volatile memory cells may be typically programmed using program/erase cycles. Such a cycle might involve first erasing the memory cells as a block and then programming the memory cells (e.g., in pages).
A typical erase operation may involve concurrently applying a number of erase voltage pulses to (e.g., across) each memory cell in each string in a block, such as by applying the erase voltage pulses to channels of the memory cells, such as to a semiconductor on which the block is formed, while concurrently applying a common low voltage, such as a ground voltage, to all of the access lines. After each application of an erase voltage, an erase verify may be performed to determine whether the block is erased, for example, by determining if the threshold voltages (Vts) of the memory cells have reached an erase Vt level. If the block is erased, the erase operation is complete. Otherwise, the magnitude of voltage and/or the time duration of the erase pulse may be subsequently increased, and a subsequent erase verify may be performed after each erase pulse until the block is verified as erased.